GE DS200 Modules – DS200TCQCG1A

Technical Dossier

Product Details And Specifications

GE DS200 Series Technical Notes

The GE DS200 series constitutes the core hardware layer of the Mark V Speedtronic turbine control platform, developed by General Electric for gas turbine, steam turbine, and combined-cycle power generation applications. Deployed across chemical processing plants, nuclear power stations, petroleum refineries, and LNG terminals worldwide, the DS200 backplane architecture has accumulated decades of field hours in environments demanding continuous availability and deterministic control response. Its modular I/O philosophy allows plant engineers to configure redundant control paths without full system replacement, making it the preferred long-term maintenance target for facilities operating GE Frame 3 through Frame 9 turbines.

The series remains active in thousands of installations across North America, the Middle East, Southeast Asia, and Europe. Despite GE's transition toward the Mark VIe platform, the DS200 installed base is sufficiently large that global demand for spare modules—both new and refurbished—remains structurally sustained through at least 2035 based on current plant lifecycle projections.

The Evolution of DS200 Architecture

The DS200 series was introduced as part of the Mark V control system in the late 1980s, replacing the earlier Mark IV analog-dominant architecture with a fully digital, distributed processing model. The original Mark V configuration used a triple-redundant TMR (Triple Modular Redundancy) voting architecture across three control processors designated R, S, and T, each populated with DS200-series boards communicating over the ARCNET-based IONet serial bus.

Early DS200 boards used through-hole component construction with EPROM-based firmware. Mid-generation revisions introduced surface-mount technology, expanded SRAM, and revised ASIC gate arrays to improve scan cycle performance. Later suffix variants (e.g., G1B, G1C, G3A) reflect PCB revision levels, component substitutions, and firmware compatibility updates—not functional redesigns. Cross-suffix compatibility must be verified against GE IS420 and GEH-6721 documentation before substitution in live systems.

The Mark V to Mark VI transition (circa 2000–2010) introduced Ethernet-based I/O over the IONET/UDH network, but the DS200 hardware remained in production support. The Mark VIe (post-2010) uses a fully different hardware family (IS420, IS215 series), and DS200 modules are not electrically or logically interchangeable with Mark VIe equivalents. This architectural discontinuity is the primary driver of aftermarket DS200 demand.

DS200 Full Catalog & Functionalities (SKU List)

The following SKUs represent verified DS200-series modules categorized by functional role. Each entry reflects a distinct board assembly with a defined role in the Mark V control architecture.

Relay Output & Contact I/O Boards

• DS200TCQCG1A: Relay output board; provides 16 discrete relay contact outputs for turbine trip and alarm circuits.
• DS200TCQAG1B: Relay output board, earlier revision; functionally equivalent to TCQCG1A with revised component layout.
• DS200TCQBG1A: Relay output board, mid-series revision; used in S and T controller slots in TMR configurations.
• DS200TCRAG1A: Contact input board; 24-channel discrete input module for turbine status and permissive signals.

Analog I/O Boards

• DS200TCDAH1B: Analog input board; 16-channel thermocouple and RTD input module with cold junction compensation.
• DS200AAHAH1A: Analog output board; 8-channel 4–20 mA output for valve positioner and actuator control.
• DS200SHVIG1B: High-voltage analog input board; handles vibration probe signals from Bently Nevada-compatible sensors.

CPU & Control Processor Boards

• DS200SDCCG1A: Sequence and diagnostic control card; primary CPU board for the R controller in Mark V TMR systems.
• DS200SLCCG3A: Sequence logic control card; handles ladder logic execution and sequence-of-events recording.
• DS200DSPCH1A: Digital signal processor card; executes high-speed PID and protective relay algorithms.
• DS200IMCPG1C: Inter-module communications processor; manages IONet ARCNET token-ring arbitration between control cards.

Power Supply Boards

• DS200PTBAG1A: Power terminal board; distributes 28 VDC and 5 VDC backplane power to I/O modules in the Mark V panel.
• DS200DCFBG1B: DC-to-DC converter board; provides isolated 5 V logic supply from 125 VDC plant battery bus.

Communications & Interface Boards

• DS200PCCAG9A: PCCA communications adapter; interfaces Mark V IONet to external MODBUS RTU or DH+ networks.
• DS200CTBAG1B: Communication terminal board; provides RS-422/RS-485 serial ports for HMI and historian connectivity.
• DS200TBCAG1A: Terminal board, control analog; field wiring termination for analog I/O modules in the Mark V marshalling cabinet.
• DS200TBQDG1A: Terminal board, quad discrete; field wiring termination for four discrete I/O modules on a single backplane slot.

Sourcing Hard-to-Find & Obsolete DS200 Parts

For obsolete suffix variants (e.g., G1A boards where only G1B is commonly available), DriveKNMS performs suffix compatibility analysis against GE engineering change notices before dispatch review. All substitution recommendations are documented and provided with the shipment for plant engineering records. Emergency urgent RFQ handling is available for critical turbine outage scenarios with prior arrangement.

Quality Control for the DS200 Range

DS200 modules present specific test challenges due to their ARCNET-based backplane communication protocol and multi-voltage power architecture. DriveKNMS operates a dedicated Mark V test bench replicating the full R/S/T TMR backplane environment, allowing functional verification of each module under realistic IONet traffic conditions.

Test procedures for relay output boards (DS200TCQCG1A and equivalents) include: contact resistance measurement on all 16 relay channels, coil drive current verification, dielectric withstand test at 1500 VAC between contact and logic circuits, and functional actuation cycling at rated load. CPU and communications boards undergo firmware checksum verification, ARCNET token acquisition testing, and RAM/EPROM integrity checks. All tested units are issued a DriveKNMS test certificate with individual channel-level results prior to shipment.