SERIPLEX 388 Series Modules

Technical Dossier

Product Details And Specifications

SERIPLEX 388 Series: Comprehensive Module Range and Technical Overview

The SERIPLEX 388 Series represents a purpose-built line of VME (Versa Module Eurocard) bus interface cards designed for deterministic, high-speed sensor/actuator networking in heavy industrial environments. Deployed extensively across chemical processing plants, petroleum refineries, nuclear power facilities, and large-scale discrete manufacturing lines, the 388 Series serves as the physical-layer bridge between SERIPLEX field bus networks and VME-based control backplanes. Its architecture supports multi-drop sensor/actuator wiring at up to 200 kbps, enabling centralized I/O management with minimal field wiring overhead. The series remains a reference design in legacy DCS and PLC hybrid architectures where VME backplane infrastructure has not been replaced.

The Evolution of 388 Series Architecture

The SERIPLEX protocol, developed originally by Square D / Schneider Electric, was standardized under IEC 62026-6 as a low-cost, deterministic sensor bus. The 388 Series interface cards were introduced to integrate SERIPLEX field networks into VME-based control systems — a dominant backplane standard in industrial computing from the late 1980s through the 2000s.

Early Generation (388-1xxx): Initial VME interface cards supported single SERIPLEX channel operation, 8-bit data width, and manual address configuration via DIP switches. Compatible with VME64 (IEEE 1014-1987) backplanes. Interrupt-driven I/O with limited diagnostic capability.

Mid Generation (388-2xxx): Introduced dual-channel SERIPLEX support, expanded node addressing (up to 255 nodes per channel), and onboard diagnostics registers accessible via VME A24/D16 addressing. The 388-2000-003 belongs to this generation. Enhanced EMI shielding for use in high-noise industrial environments.

Late Generation / Transition (388-3xxx and successors): Added firmware-configurable channel parameters, expanded memory-mapped I/O tables, and compatibility with VME64x extended addressing. As SERIPLEX adoption declined relative to DeviceNet, PROFIBUS, and later EtherNet/IP, this generation marks the end of active development. Schneider Electric formally discontinued active production of the 388 Series; support transitioned to third-party lifecycle extension providers.

Modern Replacement Path: Sites migrating away from VME/SERIPLEX infrastructure typically transition to Modicon M580 or M340 platforms with CANopen or EtherNet/IP I/O. However, the installed base of 388 Series cards in operational plants remains significant, making spare parts availability a critical maintenance requirement through at least 2035 for many facilities.

SERIPLEX 388 Series Full Catalog & Functionalities (SKU List)

The following SKUs represent the documented 388 Series module range. Each entry reflects a distinct hardware revision or functional variant within the VME interface card family:

388-2000-003: Dual-channel SERIPLEX VME interface, A24/D16 addressing, Rev C board
388-2000-001: Dual-channel SERIPLEX VME interface, A24/D16 addressing, Rev A board
388-2000-002: Dual-channel SERIPLEX VME interface, A24/D16 addressing, Rev B board
388-2000-004: Dual-channel SERIPLEX VME interface, extended diagnostic register set
388-2001-001: Single-channel SERIPLEX VME interface, A16/D16 addressing mode
388-2001-002: Single-channel SERIPLEX VME interface, interrupt vector configurable
388-2002-001: Dual-channel VME interface with onboard 512-byte FIFO buffer
388-2002-002: Dual-channel VME interface, FIFO buffer, extended temperature rating
388-2003-001: SERIPLEX VME master controller card, 255-node addressing per channel
388-2003-002: SERIPLEX VME master controller, firmware v2.x, DIP-configurable base address
388-2004-001: VME64 compatible SERIPLEX interface, 6U form factor
388-2004-002: VME64 compatible SERIPLEX interface, 6U, conformal coated for humidity resistance
388-2005-001: SERIPLEX repeater/interface card for VME backplane, signal conditioning
388-2006-001: Dual-port SERIPLEX VME interface with shared memory architecture
388-2006-002: Dual-port SERIPLEX VME interface, shared memory, Rev B
388-3000-001: VME64x SERIPLEX interface, A32/D32 addressing, firmware-configurable
388-3000-002: VME64x SERIPLEX interface, A32/D32, extended I/O map, conformal coat
388-3001-001: VME64x dual-channel SERIPLEX master, onboard diagnostics LCD header
388-1000-001: First-generation single-channel SERIPLEX VME card, A16/D8 addressing

Sourcing Hard-to-Find & Obsolete 388 Series Parts

The SERIPLEX 388 Series has been out of active production for over a decade. OEM replacement stock is exhausted through standard distribution channels. DriveKNMS maintains a dedicated inventory of 388 Series VME interface cards sourced from decommissioned plant equipment, controlled storage facilities, and verified secondary market channels.

Our sourcing protocol for 388 Series modules includes: cross-referencing part numbers against revision history to prevent incompatible substitution; verifying board revision markings against customer system documentation; and confirming firmware version compatibility where applicable. For customers operating mixed-revision VME backplanes, we provide revision-matched sets to eliminate bus arbitration conflicts.

DriveKNMS supports lifecycle extension contracts for facilities that require guaranteed 388 Series availability over multi-year maintenance windows. Contact our technical team to discuss consignment stock arrangements or priority allocation agreements.

Quality Control for the 388 Series Range

VME interface cards present specific test challenges due to their backplane bus dependency and multi-layer PCB construction. DriveKNMS applies the following test procedures to all 388 Series units prior to shipment:

Visual and Physical Inspection: Board-level inspection for capacitor ESR degradation, connector pin integrity (P1/P2 VME connectors), and trace corrosion. Conformal coating integrity check on coated variants.

VME Bus Functional Test: Each card is seated in a calibrated VME64 test chassis. Address decode logic is verified across the full A16/A24/A32 range as applicable to the specific SKU. Data transfer integrity is confirmed at D8, D16, and D32 widths.

SERIPLEX Channel Test: Both channels (on dual-channel variants) are exercised against a SERIPLEX test network with 16 simulated nodes. Node polling cycle time, error frame detection, and channel isolation are measured and logged.

Interrupt and DMA Verification: Interrupt vector generation and DMA transfer modes are tested where supported by the firmware revision.

Burn-In: Units are operated at elevated temperature (55°C) for a minimum of 24 hours under continuous SERIPLEX polling load before final acceptance.

All test results are documented and available to customers upon request. Units that do not pass all test stages are quarantined and not offered for sale.