GE DS200 Modules – DS200TCQRG1RFC

Technical Dossier

Product Details And Specifications

GE DS200 Series Technical Notes

The Evolution of DS200 Architecture

The DS200 board family was introduced as the hardware substrate for GE's Mark V Speedtronic platform, which succeeded the Mark IV in the late 1980s. Mark V employed a triple-redundant TMR (Triple Modular Redundancy) architecture across three control processors — designated , , and — with DS200 boards distributed across multiple panel racks (TCPS, TCEA, TCBA). Each board communicated via the IONet serial bus and the ARCNET-based inter-processor network.

With the introduction of Mark VI in the mid-1990s, GE transitioned to a more modular VME-based architecture. A subset of DS200 boards remained compatible or were directly carried over into early Mark VI configurations, while new VMIVME and IS200 series boards began replacing specific DS200 functions. By the 2000s, Mark VIe introduced Ethernet-based I/O and rendered most DS200 hardware legacy. However, the installed base of Mark V systems — and the DS200 boards within them — remained too large to retire rapidly, creating a sustained demand for replacement and repair inventory that persists through the 2020s.

Compatibility constraints are significant: DS200 boards are not hot-swappable across all panel positions without firmware and jumper verification. Substitution between hardware revisions (e.g., G1 vs. A1 suffix variants) requires engineering review. End-users operating Mark V systems must source boards with matching revision codes to avoid control system faults.

DS200 Full Catalog & Functionalities (SKU List)

The following verified DS200 SKUs represent the primary functional categories within the series. Each entry reflects a distinct board function within the Mark V or early Mark VI control architecture.

Turbine Control & Processor Boards

• DS200TCQRG1RFC: Turbine control qualification board, Mark V TMR core I/O interface, R-core panel position.
• DS200TCQAG1BHF: Turbine control qualification board, A-revision, used in primary control loop processing.
• DS200TCRAG1BHF: Turbine control relay output board, analog/relay hybrid, Mark V panel integration.
• DS200TCDAH1BHF: Turbine control diagnostic board, system health monitoring and fault logging.
• DS200TCQBG1AAA: Turbine control qualification board, B-revision, secondary redundancy path.
• DS200DSPCH1ADA: Digital signal processor control board, high-speed computation for turbine sequencing logic.

I/O and Signal Conditioning Boards

• DS200AAHAH1AKD: Analog input board, 16-channel thermocouple/RTD signal conditioning, Mark V TCEA panel.
• DS200ADGIH1AAA: Analog-to-digital input board, general-purpose process variable acquisition.
• DS200CTBAG1ADD: Contact input/output terminal board, discrete signal interface for field devices.
• DS200TBCAG1AAA: Terminal board, analog signal marshalling and field wiring termination.
• DS200TBQAG1A: Terminal board, qualification signal routing between field and control boards.
• DS200PTBAG1ABA: Power terminal board, DC power distribution and fusing within panel rack.

Communication and Network Boards

• DS200SDCCG1AFD: Serial data communication controller, ARCNET/IONet interface for inter-processor data exchange.
• DS200SHCAG1ABA: Serial highway communication adapter, plant DCS integration via serial protocol gateway.
• DS200PCCAG5ACB: PC communication adapter board, HMI and engineering workstation interface.
• DS200DCFBG1BKA: DC-to-DC converter and filter board, isolated power supply for sensitive analog circuits.

Sourcing Hard-to-Find & Obsolete DS200 Parts

GE formally discontinued Mark V hardware support, and the DS200 series has been classified as end-of-life (EOL) by the OEM. Replacement with Mark VIe or third-party migration kits is the recommended long-term path; however, the capital cost and engineering complexity of full platform migration means the majority of operators continue running Mark V systems on extended lifecycle support.

Quality Control for the DS200 Range

DS200 boards present specific testing challenges due to their multi-layer backplane connectors, ARCNET communication interfaces, and mixed analog/digital signal paths. Standard functional testing is insufficient for turbine control applications where undetected latent faults can cause spurious trips or failure-to-trip conditions.