YASKAWA DDSCR Series Modules DDSCR-U84-124

Technical Dossier

Product Details And Specifications

YASKAWA DDSCR Series Technical Notes

The Evolution of DDSCR Architecture

The DDSCR series was introduced as part of YASKAWA's transition from analog-based process control to fully digital distributed control systems (DCS) during the late 1980s and early 1990s. Early DDSCR hardware relied on proprietary backplane bus communication operating at fixed baud rates, with module addressing determined by physical slot position. This architecture imposed strict hardware revision compatibility constraints: CPU modules, I/O modules, and communication adapters must match within defined firmware revision bands to maintain bus integrity.

Mid-generation revisions introduced enhanced diagnostic registers and expanded memory addressing, enabling larger control loop counts per CPU node. Later variants added support for YASKAWA's MECHATROLINK communication protocol extensions, bridging the DDSCR platform toward integration with motion control subsystems. However, the core backplane electrical specification remained unchanged across generations, meaning physical module substitution is possible between certain revision ranges — a critical factor for maintenance engineers sourcing replacement parts for aging installations.

DDSCR Full Catalog & Functionalities (SKU List)

CPU & Controller Modules

• DDSCR-U84-124: Main CPU module; 32-bit processor; primary system coordinator for DDSCR node
• DDSCR-U84-110: CPU module variant; reduced memory configuration; single-node standalone control
• DDSCR-U84-130: High-capacity CPU; extended loop count; dual-port RAM for redundant comms
• DDSCR-U84-140: CPU module with integrated watchdog timer; failsafe shutdown logic
• DDSCR-U84-150: Enhanced CPU; supports expanded I/O map; used in multi-drop bus configurations

Digital Input (DI) Modules

• DDSCR-DI-16A: 16-channel 24VDC digital input; isolated per channel; status LED per point
• DDSCR-DI-32B: 32-channel digital input; grouped isolation; high-density field wiring terminal
• DDSCR-DI-16C: 16-channel 120VAC digital input; surge-protected; for high-voltage field devices

Digital Output (DO) Modules

• DDSCR-DO-16A: 16-channel 24VDC digital output; transistor sink type; 0.5A per channel
• DDSCR-DO-32B: 32-channel digital output; relay contact type; 2A per channel; for solenoid valves

Analog Input (AI) Modules

• DDSCR-AI-08A: 8-channel analog input; 4–20mA; 12-bit resolution; for process transmitters
• DDSCR-AI-08B: 8-channel analog input; ±10V / 4–20mA selectable; thermocouple compensation
• DDSCR-AI-16A: 16-channel analog input; multiplexed; 13-bit resolution; high-density process monitoring

Analog Output (AO) Modules

• DDSCR-AO-08A: 8-channel analog output; 4–20mA; 12-bit DAC; for control valve positioners
• DDSCR-AO-04B: 4-channel analog output; ±10V; high-drive; for electro-hydraulic actuators

Communication & Network Adapter Modules

• DDSCR-CM-01: RS-232C/RS-485 serial communication adapter; MODBUS RTU master/slave
• DDSCR-CM-02: YASKAWA proprietary fieldbus adapter; node-to-node DCS backbone link
• DDSCR-CM-03: Ethernet TCP/IP gateway module; OPC-DA server interface for SCADA integration

Power Supply Modules

• DDSCR-PS-24A: 24VDC backplane power supply; 10A output; input 100–240VAC universal
• DDSCR-PS-24B: Redundant power supply module; hot-swap capable; for critical node configurations

Quality Control for the DDSCR Range

DDSCR modules present specific test challenges due to their proprietary backplane bus protocol and slot-addressed communication architecture. Standard bench power-up is insufficient to validate module functionality; full operational verification requires a compatible DDSCR backplane and CPU reference unit.

DriveKNMS employs a dedicated DDSCR test rig replicating the original backplane electrical environment. Each CPU module, including the DDSCR-U84-124, undergoes the following verification sequence: power rail integrity check (3.3V, 5V, 12V backplane rails); bus communication handshake confirmation; firmware version readback and logging; I/O channel functional test (for I/O modules); 48-hour burn-in under simulated cyclic load; and final visual inspection per IPC-A-610 Class 2 criteria. All tested units are issued a DriveKNMS test certificate with date, technician ID, and pass/fail data for each test stage.