Mitsubishi F2 Series Modules – F2-40MR

Technical Dossier

Product Details And Specifications

Mitsubishi F2 Series Technical Notes

The Mitsubishi Electric F2 Series programmable controller occupies a well-documented position in global heavy industry installations, including petrochemical plants, refinery process lines, power generation facilities, and continuous manufacturing operations. Introduced as a mid-range PLC platform, the F2 Series established a standardized I/O architecture that allowed plant engineers to scale discrete and analog control across multiple production units from a single hardware family. Its compact relay-output and transistor-output variants became reference hardware in Asian and European industrial markets throughout the 1980s and into the 1990s. Many F2-based control panels remain in active service today, supported by a global aftermarket parts network due to the platform's long installed base and the high cost of full system migration.

The Evolution of F2 Series Architecture

The F2 Series was positioned between Mitsubishi's entry-level F Series and the more capable A Series (MELSEC-A) platforms. Its CPU architecture used a fixed-cycle scan model with relay ladder logic execution, consistent with IEC 61131-3 predecessor conventions. Early F2 units featured onboard I/O integrated into the CPU module, reducing panel footprint for small-to-medium applications. As the platform matured, Mitsubishi introduced expansion I/O units that connected via a dedicated parallel bus, allowing total I/O counts to scale beyond the base unit's onboard capacity.

Relay output variants (suffix MR) were specified for applications requiring galvanic isolation and compatibility with AC load circuits. Transistor output variants (suffix MT) targeted high-speed switching and DC load applications. The F2 Series was eventually succeeded by the MELSEC-F (FX) Series, which introduced a more compact form factor, higher instruction throughput, and expanded communication options including RS-422 and RS-485 interfaces. F2 hardware is not directly software-compatible with FX-series CPUs, making like-for-like F2 replacement the preferred maintenance strategy for sites that cannot undertake full migration projects.

F2 Series Full Catalog & Functionalities (SKU List)

The following SKUs represent verified models within the Mitsubishi F2 Series platform, classified by functional category:

CPU / Base Units (Relay Output)

• F2-40MR: 40-point relay output base unit CPU, 24 inputs / 16 outputs, onboard power supply
• F2-60MR: 60-point relay output base unit CPU, 36 inputs / 24 outputs, onboard power supply
• F2-20MR: 20-point relay output base unit CPU, 12 inputs / 8 outputs, compact footprint
• F2-30MR: 30-point relay output base unit CPU, 18 inputs / 12 outputs, standard DIN rail mount

CPU / Base Units (Transistor Output)

• F2-40MT: 40-point transistor output base unit CPU, 24 inputs / 16 outputs, NPN sink type
• F2-60MT: 60-point transistor output base unit CPU, 36 inputs / 24 outputs, NPN sink type
• F2-20MT: 20-point transistor output base unit CPU, 12 inputs / 8 outputs, high-speed pulse output
• F2-30MT: 30-point transistor output base unit CPU, 18 inputs / 12 outputs, NPN sink type

Expansion I/O Units

• F2-8EX: 8-point DC input expansion unit, 24 VDC sink/source compatible
• F2-8EYR: 8-point relay output expansion unit, 2A per point, 250 VAC / 30 VDC rated
• F2-8EYT: 8-point transistor output expansion unit, NPN open collector, 0.5A per point
• F2-16EX: 16-point DC input expansion unit, 24 VDC, high-density I/O extension
• F2-16EYR: 16-point relay output expansion unit, 2A per point, AC/DC load compatible
• F2-16EYT: 16-point transistor output expansion unit, NPN sink, 0.5A per point

Special Function / Communication Modules

• F2-30GM: Positioning / motion control module, pulse train output, 2-axis independent control
• F2-232CAB: RS-232C communication adapter cable for F2 CPU programming interface

Quality Control for the F2 Series Range

F2 Series hardware presents specific test challenges due to its integrated CPU-and-I/O architecture and parallel expansion bus design. DriveKNMS applies the following test protocol to all F2 units prior to dispatch:

• Power-on verification: Input voltage applied within rated range (100–240 VAC or 24 VDC depending on variant); RUN LED status confirmed.
• CPU scan cycle test: Ladder logic test program loaded via F2-232CAB interface; scan time measured and compared against published specification.
• Discrete input point test: All input terminals exercised individually using a calibrated signal source; response confirmed in I/O monitor mode.
• Relay output contact test: Each output relay actuated under resistive load; contact resistance measured; NO/NC switching verified.
• Transistor output test (MT variants): Leakage current and saturation voltage measured per point under rated DC load.
• Expansion bus integrity check: Expansion I/O units connected and polled; data integrity across parallel bus confirmed with no communication errors.
• Memory retention test: Program and data register retention verified across simulated power cycle using onboard battery-backed RAM.

Units that do not pass all test stages are quarantined, documented, and not released for sale.